Flash memory is prevalent in modern servers and devices. Coupled with the scaling down of flash technology, the popularity of flash memory motivates the search for methods to increase flash reliability and lifetime. Erasures are the dominant cause of flash cell wear, but reducing them is challenging because flash is a write-once medium - each memory cell must be erased prior to writing. An approach that has recently received considerable attention relies on write-once memory (WOM) codes, designed to accommodate additional writes on write-once media.
This project conducts a thorough hardware evaluation to map the constraints and possibilities of rewriting on state-of-the-art flash chips. We will use the results of this evaluation to define a new WOM model that expresses these properties and to construct codes that can be applied to modern flash chips. We will then take advantage of these characterizations, WOM model and codes to design an SSD that reuses flash pages for improved reliability, lifetime and performance. We will demonstrate the applicability of our design by implementing a hardware prototype and evaluating its performance on a large set of workloads and system setups.
Partners
Funding Period
01/2017 - 12/2019